Professional Experience
07/2005 - present
Principal Engineer -
3B Consultancy
, France
Principal Engineer -
3B Consultancy LLC
, California, USA
To get further information on consulting services supplied by 3B Consultancy, feel free to contact
The Economy collapsed around October 2008. As lot of other people, I was directly impacted. I have been using this jobless time to do various things with the view to enriching my skills, knowledge and of course résumé. These activities are presented in a dedicated web-page since I believe keeping track of these involvments was really worthwhile and valuable.
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Presentation at ARM Developers' Conference 2008 in Santa-Clara, California: Register Management of a Complex Multi-Processor Based SoC , Dave Murray, Brian Clinton, Zoltan Sugar for DUOLOG Technologies. Acknowledgements to TI - WTBU Team in Nice: Hedi Boufaied, Bertrand Blanc, Bob Maaraoui, Denis Kuntz.
"With increasing SoC complexity, critical paths are emerging in the integration of the software components of the system causing a significant impact on cost, quality and development schedules. The increasing focus on IP reuse and earlier hardware integration have exposed software integration as a burgeoning critical path. The manual transcribing of information from documents is now leading to resource wastage, questionable quality and poor reusability. This presentation outlines a multi-faceted solution to this problem incorporating a single source SW/HW interface model with a high-level of abstraction, coherency checking and a high-level of collaboration and automation that promotes a correct-by-construction methodology."
| >>full presentation | >>acknowledgements |
Bob Maaraoui, Senior Member of the Technical Staff, Hardware Methodologies & EDA, Xxxxx Xxxxxxxxxxx
In the context of IP-XACT: study realized as an outcome of DAC'08 exhibitions in Anaheim, California. This presentation aims at presenting, as round-table support, the minor companies involved in state-of-the-art market trends: W3C, IP-XACT, ECLIPSE.
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White Paper:
Endianness or Where is Byte 0?
Bertrand Blanc for 3B Consultancy and Bob Maaraoui for Texas Instruments. |
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| >> white paper | >> alternate source from The SPIRIT Consortium | >> alternate source from Georgia Tech |
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To accelerate the design of large System-on-Chip (SoC) solutions, the semiconductor industry needs a standard mechanism for describing and handling multi-sourced IP that enables automated design integration and configuration within multi-vendor tool flows. The SPIRIT Consortium's founding companies are combining their long experience in IP development, supply, integration and electronic design automation (EDA) to deliver such a mechanism. The Consortium provides a unified set of specifications based on IP meta-data, the IP-XACT specifications, for importing complex IP bundles into SoC design tool sets, and exchanging design descriptions between tools. |
09/2004 - 07/2005
Technical Account Manager - Beach Solutions , UK
Beach Solutions has pioneered the development of innovative EDA tools and associated technology to address many of the growing integration challenges of complex System on Chip designs. Beach Solutions has established a leading position in schema and generator technology through the deployment of object orientated analysis techniques. Built on this technology, EASI-Tools greatly accelerates the process of system integration, minimises the likelihood of rework due to functional errors, and provides reliable IP re-use tailored to customer's design flows.
To get further information on the products supplied by Beach Solutions, feel free to contact
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"Structure for Packaging, Integrating and Re-using IP within Tool-flows |
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"[...]OCP-IP is a ground-breaking industry association dedicated to making a common standard for intellectual property (IP) core interfaces, or sockets, that facilitate "plug and play" System-on-Chip (SoC) design. To make complex SoC design a reality for a broader audience, the industry needs a complete socket standard that everyone can use, no matter what their on-chip architecture is, or whose processor cores they're using. The benefits of a standard socket for SoC design are many and they are discussed in several places on our site.[...]" |
05/2003 - 08/2004
Consultant Engineer - Esterel Technologies , FR
To get further informations on the product EsterelStudio which aims to produce correct-by-construction, bug-free, RT applications from Napkin to either embedded C or synthesizable HDL net-list, feel free to contact Esterel Technologies
Supported registers' capture flows from IP modules to top-level integration for both Verification and Technical Reference Manual. Proposed and defined enhancements and improvements for EDA tools dedicated to registers capture and IP-reuse.
Proposed a language called RD (standing for Register Description) to describe registers, components, and sub-systems targeting high efficiency re-use writing things once. From this unique capture specification source, various business fields are targeted: Architecture & IP Specification, Verification, Validation, Technical Reference Manual, ... Documents below present this study.
| >>technical paper | >>RD definition (syntax & semantics) |
Designed and validated IP core components dedicated to embedded wireless products, using the EsterelStudio v5.0 Suite.
Paper presented to the 7th SAME'04 forum on Microelectronics in Sophia-Antipolis and awarded: Multiclock Design and Synthesis with Esterel, Simona Bernardi, Stéphane Lebailly for Texas Instruments and Bertrand Blanc, Gérard Berry, Jérôme Dormoy for Esterel Technologies.
| >>abstract | >>full paper | >>slides |
Professional Experience:
Internships, Part-Time employments and other Professional Activities during Studies
2002
Teaching Activities
Internet and Networks (ESSI II)
Computer Architecture and Technology ( presentation in french )
2002
The French National Institute for Research in Computer Sciences and Control (INRIA)
Theory and Practice of Synchronous Reactive Systems
Sophia-Antipolis, France
Analysed, defined and implemented an application taken an Esterel structured program, translating it into a Hardware Description Language more in french
This work was presented at the 9th International Open Workshop on Synchronous Reactive Languages SYNCHRON'02 in November 2002 presentation
contact: ,2001-2002
Esterel Technologies
Villeneuve-Loubet, France
Defined specifications and implemented an oriented Hardware Description Language test-bench generator taken as mandatory inputs, an Esterel interface and a scenario file. Thereafter generated an equivalent scenario into a selected VHDL-Verilog-C-C++ target language more
contact: manager of the R & D for Hardware Team1999-2000
Centre National de la Recherche Scientifique (CNRS)
Marseilles, France
Defined specifications and implemented a language for real-time experiments pilot scheme more in french (PDF)
contact: manager of the lab.Other activities
1998-1999
Supermarket BUT
Aubagne, France
Salesclerck in TV/Hi-Fi/Video, household appliances, computers and cellphones
1995-1999
Many part time jobs in different fields (network manager, cleaner, salesclerck) in order to finance studies